Technical Programme

A Multi-Mode Ultra-Low-Leakage SRAM Architecture in 18-nm FDSOI Technology Targeting Energy Harvesting Products

👤 Shreyash Tripathi and Gajesh Kumar Daga

A Hardware-Efficient Dual-Mode Polynomial Sampling Architecture With Hash Integration For Post-Quantum Cryptography

👤 Alahari Sri Lakshmi Sravya, Basu Venkatapavani and MD NAJRUL ISLAM

COTS-Based Configurable Biopotential Signal Acquisition System

👤 Nilkanth Jagani and Biswajit Mishra

Design and Sustainability Benchmark of Static and Dynamic Post-Decoders for High-Density and High-Speed SRAM

👤 Aditya Raj Chauhan and Anuj Grover

Error analysis of DWT for RNN-LSTM-based speech classifier with custom floating-point datapath

👤 Bikramjit Barik and Arunachalam V

AayuSense: Portable AI-Based Electronic Tongue for Liquid Medical Adulteration Detection and Quality Assessment

👤 Harshima Joshi, Umesh Pandey, Anup Gupta, Swayam Jha and Nishtha Kansal

FPGA-Accelerated GAN on PYNQ-Z2 for Real-Time Image Generation

👤 Bhagavatula Sai Surya, Puchakayala Anil Chowdary, Mamidipaka Lakshmi Sai Narayana and Bharat Bhushan Upadhyay

Hybrid Signed MAC-Driven Stochastic SqueezeNet for Hardware-Constrained Neural Network Inference

👤 Mahanta Talakal, Mallikarjun Yeshlur, Omkar N R, Sahithi G and Rajeshwari B

Low-Power and High-Performance 4-Bit Vedic Multiplier Using CNTFET Technology

👤 VAISHALI H. DHARE, Krish Patel and Sanskar Gupta

Improving Diagnostic Accuracy of Early Lung Cancer Using a Dual-AI Framework and CMOS Biosensor

👤 Shresth Mishra, Arushi Jain, Dr Garima Kapur and Aditya Pawar

Reconfigurable Voltage-Divider-Based Non-Volatile 8T-2MTJ Bitcell for Ternary Search and Logic-in-Memory Applications

👤 Deepak Joshi, Sukhen Mondal, Mohit Gupta, Ravi S. Siddanath, Suman Hallur, Manish Goswami and Kavindra Kandpal

Investigation for Gate Engineering of Superlattice AlGaN/GaN Dielectric-Modulated Dual-Gate Dual-Channel Multi-Cavity MOSHEMT

👤 Tulip Saha, Prof. Rudra Dhar and Moumita Mukherjee

Design and Comprehensive Verification of a High-Throughput AXI4 Interconnect Fabric Supporting Out-of-Order Transactions and Pipeline Resilience

👤 Shail Nimeshkumar Shah and Sachin Gajjar

E-ReCON: An Energy- and Resource-Efficient Precision-Configurable Sparse nvCIM Macro for Conventional and Spiking Neural Edge Inference

👤 Ankit Kumar Tenwar, Mukul Lokhande and Santosh Kumar Vishvakarma

Design of a CMOS Hardware-Based Anti-Theft and Tamper Detection Chip with Integrated Low Dropout Voltage Regulator

👤 Piyush Nautiyal, Dishita Dishita, Abhinav Sharma and Nishtha Kansal

A Voltage-Tunable OTA-Based State Variable Filter for ECG R-Peak Extraction Validated on the MIT-BIH Database

👤 Malay Vaghasiya and Dr. Pankaj Kumar

Preliminary Performance Analysis of FORE2D: An FPGA-Accelerated Vector Graphics Engine

👤 Siddhartha Sarkar, Pratyush Kumar, Lalit Bansal, Tanmay Arnav, Ripul Ghosh, Ashish Gaurav and Satish Kumar

FPONGA: A Field-Programmable Optimized Native Game Architecture for Real-Time Video Processing

👤 Parth Satra, HARDIK RATHI, Aashay Agarwal and Govind prasad

Precision-Aware FPGA Implementation of Floating-Point and Posit-Based Derivative Accelerators

👤 Aiman Malik, Ethesham Ahmed and Mohd Wajid

A Low-Leakage & Area Efficient Multi-Bit Scan Pulsed Latch Design in SCL 180 nm Technology

👤 Samarth Agarwal and Anuj Grover

AVNet (Accelerator-Optimized ConVolutional Network): A hardware-efficient CNN for FPGA-based deployment using HLS4ML for PCB defect detection

👤 VALLABHAJYOSYULA VISWA VIBHU, ANJU YAJJALA and DELLA THOMAS

Banking based Adaptive Mapping Architecture for High Speed Operation in Reconfigurable Hardware

👤 Riddhima Agarwal, Jatin Wadhera, Aarya ., Dhruv Raj Ghai, Manu Bansal and Anil Singh

Design and Formal Verification of a Logarithmic-Posit Arithmetic Core for Edge Neural Acceleration

👤 Rangeetha S and Akaashraj P

4.608-TOPS SRAM Based DCIM Macro with Hierarchical Accumulation for Quantized CNNs

👤 Vikash Kumar Sharma, Vikash Vishwakarma and Santosh Kumar Vishvakarma

Borophene Dieletric Modulated-Tunnel FET Biosensor for Breast Cancer Detection with Optimised Gate Dielectric Design

👤 Vibhash Choudhary and Manoj Kumar

Trap-Induced Reliability-Aware Monolithic Mixed-Mode TCAD Realization of FinFET 6T SRAM: Eliminating Interconnect Abstraction

👤 HANUMAT PRASAD YADAV, SUNIL RATHORE, Sandeep Kumar and Navjeet Bagga

Design and Performance analysis of Si0.3Ge0.7 based Dual Cavity- Double Gate (DC-DG) ISFET for improved pH sensing application

👤 Upendra Nath Soni, Alok Naugarhiya and Chitrakant Sahu

High Frequency RF and Signal Integrity Analysis of GSSG Through-Glass Via Structures

👤 Sumit Gupta, Mugdha Sharma and Sanjeev Kumar Manhas